Interrupt Handlers as Locks: A Deadlock-Free SMP Design

This document proposes using CPU interrupt handlers as a synchronization primitive for multicore kernels, replacing traditional spinlocks and mutexes. The architecture uses a static IDT with a common stub and a global function pointer array, enabling instantaneous handler swapping across all cores. This approach leverages the CPU's mandatory interrupt handling to achieve deadlock-free synchronization without the overhead of conventional locking mechanisms.